An­ge­bot 158 von 322 vom 31.07.2018, 14:27


Fer­ro­electric Memory GmbH (FMC) - Semi­con­duc­tors

We are a spin-off from TU Dres­den com­mer­cia­li­zing a novel non­vo­la­tile memory tech­no­logy. We col­la­bo­rate with cut­ting edge semi­con­duc­tor com­pa­nies to bring both our memory tech­no­logy and our memory IC designs to various cust­o­m­ers world­wide.

Memory Reli­ab­il­ity Engin­eer (m/f)

Work­ing field:

You will be respons­ible for devel­op­ment of memory tests to identify the root cause of device fail­ure/mal­func­tion. Under­stand­ing the degrad­a­tion/fail­ure mech­an­isms and reli­ab­il­ity require­ments of our embed­ded memory tech­no­logy as well as con­trib­ut­ing to defin­i­tion of fail­ure modes and reli­ab­il­ity tar­gets. You will sup­port the team by per­form­ing and devel­op­ing accel­er­ated test­ing and data ana­lysis tech­niques for reli­ab­il­ity char­ac­ter­iz­a­tion and qual­i­fic­a­tion. You will develop empir­ical and phys­ics-based pre­dict­ive mod­els for reli­ab­il­ity assess­ment and qual­i­fic­a­tion.


  • M.Sc. / M.Eng. or higher in phys­ics or elec­trical engin­eer­ing
  • Famili­ar­ity with industry-stand­ard test equip­ment and soft­ware
  • Good tech­nical com­pre­hen­sion
  • Strong prob­lem solv­ing abil­ity
  • Abil­ity to work in a team envir­on­ment
  • Interest in work­ing in a start-up envir­on­ment

What we of­fer:

Com­pet­it­ive salary will be based on a com­bin­a­tion of fixed salary and yearly bonus pay­ments.

How to ap­ply:

For fur­ther inform­a­tion please con­tact:

Fer­ro­elec­tric Memory GmbH
Attn.: Johannes Ocker
Noeth­nitzer Str. 64
Dresden, Ger­many

T +49 162 9313031